The present invention relates to a method for characterization of a layered structure, specifically, of a gate stack for fabrication of high mobility channel semiconductor devices.
Semiconductor components, such as microprocessors are formed from high-density integrated circuits (ICs). Semiconductor device fabrication is a multi-step and complex process consisting of numerous steps, where each process step requires the use of ultra-sensitive machinery and techniques. The formed semiconductor device can be quality tested after the completion of the fabrication sequence, where full-wafer functional test and/or specific circuits of the device are performance-tested under pre-determined operating conditions. Waiting to test the semiconductor device until after completion of the fabrication process does not allow for determination of where in the fabrication process a failure occurred. Accordingly, as the semiconductor fabrication is so complex, it is often desirable to monitor the quality of the wafer at various times during the fabrication process. Therefore, if problems such as defects and/or process excursions are encountered in the fabrication and detected quickly, the fabricator can take remedial action.
Wafer quality during the fabrication process can be monitored by measuring certain parameters that can be indicative of possible problems or unanticipated outcomes from the fabrication process. These parameters can be monitored, for example, by means of optical and electron beam techniques. In one approach, measurements are made to verify certain physical parameters such as gate width, gate-oxide thickness, interconnect width, and dielectric height. Under such an approach, the measurements can be made on test structures in the wafer scribe area, adjacent to the active portion of the chips.
A further approach uses electrical testing of specialized test structures positioned in a scribe portion of the wafer that will not be used in the final product.
As semiconductor devices are constantly decreasing in size and are becoming increasingly complex, improved methods to monitor the fabrication process are desired.